有人能提供《基于FPGA的PID控制器的设计》的相关程序吗？感激不尽！
有人能提供《基于FPGA的PID控制器的设计》的程序吗？感激不尽！ 再给你来一个版本的，因为本人没有用过，所以也没做实际的验证，如果你验证后证明可行，请回复，以方便大家。module PID_ctrlplus (kt,T,K,L,U);
inputkt,T,K,L;
output U;
reg U;
wire kt;
wire T,K,L;
reg U1,U2,U3,U4,U5,U6,U7,U8,U9;
parameter Ts=0.0002;
always @ (kt or T or K or L)
begin
U1=12*T*kt*Ts;//10
U2=3*T*Ts*Ts*kt*(kt+1);
U3=6*T;
U4=K*L;
U5=K*L*L;
U6=U1/U4;
U7=U2/U5;
U8=U3/K;
U9=U6+U7+U8;
U=U9/10;
end
endmodule
module te_pid_ctrl;
reg kt;
reg T,K,L;
wire U;
PID_ctrlplus CGX(kt,T,K,L,U);
reg clk;
initial
begin
clk<=0;
kt<=50;
end
always
begin
#1000
clk<=~clk;
end
always @ (posedge clk)
begin
T<=2000;
K<=5;
L<=2;
#20
if(kt<100)
kt=kt+1;
else
kt<=50;
end
endmodule 这个是在网上下载的，基于Verilog。希望能对你有所帮助 //############################################################################
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// (C) Copyright Laboratory System Integration and Silicon Implementation
// All Right Reserved
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//
// ICLAB 2011 Spring
// Lab02 : PID
// Author : Ju-Hung Hsiao (ju0909@si2lab.org)
//
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//
// File Name : PID.v
// Module Name : PID
// Release version : V1.0 (Release Date: 2011-03)
//
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//############################################################################
module PID(//input
MODE,
IN_A,
IN_B,
IN_C,
IN_D,
IN_X1,
IN_X2,
SHIFT,
//output
OUT);
inputMODE;
input[ 4:0] IN_A, IN_B, IN_C, IN_D;
input[ 4:0] IN_X1, IN_X2;
input[ 4:0] SHIFT;
output OUT;
wire signedA, B, C, D;
wire signedX1, X2;
assign A = IN_A;
assign B = IN_B;
assign C = IN_C;
assign D = IN_D;
assign X1 = IN_X1;
assign X2 = IN_X2;
//----------------------------Basic Coefficient-----------------------------//
wire signed temp2=X2*X2;
wire signed temp4=temp2*temp2;
wire signed tp2=X1*X1;
wire signed tp4=tp2*tp2;
//need to plus one bit to avoid subtraction overflow
wire signed temp41=temp4-tp4;
wire signed temp21=temp2-tp2;
wire signed temp11=X2-X1;
//1.ten instead of eight bit to be more convinient use later
//2.division and multiply with small number will be mapped to shift and add automatically
wire signed temp4A = (A<<<4)/4;//use shift??
wire signed temp4B = (B<<<4)/4;
wire signed temp4C = (C<<<4)/4;
wire signed temp4D = (D<<<4)/4;
wire signed temp2A = (A<<<4)/2;
wire signed temp2B = (B<<<4)/2;
wire signed temp2C = (C<<<4)/2;
wire signed temp2D = (D<<<4)/2;
wire signed temp33A = 3*A;
wire signed temp33B = 3*B;
wire signed temp33C = 3*C;
wire signed temp33D = 3*D;
wire signed temp22A = 2*A;
wire signed temp22B = 2*B;
wire signed temp22C = 2*C;
wire signed temp22D = 2*D;
//----------------------------Multiplexer Part-----------------------------//
wire signed FIRST=({SHIFT,MODE}==3'b000)?temp4A:
({SHIFT,MODE}==3'b010)?temp4B:
({SHIFT,MODE}==3'b100)?temp4C:
({SHIFT,MODE}==3'b110)?temp4D:
({SHIFT,MODE}==3'b001)?{temp33A,4'b0000}:
({SHIFT,MODE}==3'b011)?{temp33B,4'b0000}:
({SHIFT,MODE}==3'b101)?{temp33C,4'b0000}:
{temp33D,4'b0000};
wire signed SECOND=({SHIFT,MODE}==3'b000)?temp2C:
({SHIFT,MODE}==3'b010)?temp2D:
({SHIFT,MODE}==3'b100)?temp2A:
({SHIFT,MODE}==3'b110)?temp2B:
({SHIFT,MODE}==3'b001)?{temp22B,temp22B,4'b0000}:
({SHIFT,MODE}==3'b011)?{temp22C,temp22C,4'b0000}:
({SHIFT,MODE}==3'b101)?{temp22D,temp22D,4'b0000}:
{temp22A,temp22A,4'b0000};
wire signed THIRD=({SHIFT,MODE}==3'b000)?D:
({SHIFT,MODE}==3'b010)?A:
({SHIFT,MODE}==3'b100)?B:
({SHIFT,MODE}==3'b110)?C:
({SHIFT,MODE}==3'b001)?C:
({SHIFT,MODE}==3'b011)?D:
({SHIFT,MODE}==3'b101)?A:
B;
wire signed EL1=(MODE)?{{11{temp2}},temp2}:temp41;
wire signed EL2=(MODE)?{{6{X2}},X2}:temp21;
wire signed EL3=(MODE)?5'b00001:temp11;
//1.Over 4 bit to shift
//----------------------------Calculate Part-----------------------------//
wire signed t1 = ({{25{FIRST}},FIRST}*{{{11{EL1}},EL1},4'b0000})>>>4;
wire signed t2 = ({{25{SECOND}},SECOND}*{{{21{EL2}},EL2},4'b0000})>>>4;
wire signed t3 = ({{{27{THIRD}},THIRD},4'b0000}*{{{26{EL3}},EL3},4'b0000})>>>4;
wire signed tt10 = t1+t2;
assignOUT=tt10+t3;
endmodule
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