求助LAB-wide clock 怎么理解？

各位：
         我想请问一下LAB-wide clock怎么理解？？芯片手册上的原话如下：
If the LAB uses both the rising and falling edges of a clock, it
also uses two LAB-wide clock signals. De-asserting the clock enable signal turns off
the corresponding LAB-wide clock.

回复 1# qingmingjun


    各位大神，有木有对这个了解的？？