我要设计一个位串的数组，并初始化，可编译通过不了

我的代码如下
subtype myvector is bit_vector(7 downto 0);
type cname is array(1 downto 0) of myvecor;

constant c_list:cname:=(x"41",x"42");

编译提示aggregates are supported only for types that map to an array of bits”, 应该怎么处理呢？

感觉你把vhdl写成C语言了。