我在做PS/2键盘实验,可能由于键盘来的时钟未连至全局时钟管脚,综合时提示
ERRORlace:1018 - A clock IOB / clock component pair have been found that are not placed at an optimal clock IOB /
clock site pair. The clock component <N9_BUFG> is placed at site <BUFGMUX7>. The IO component <psclk> is placed at
site <11>. This will not allow the use of the fast path between the IO and the Clock buffer. If this sub optimal
condition is acceptable for this design, you may use the CLOCK_DEDICATED_ROUTE constraint in the .ucf file to demote
this message to a WARNING and allow your design to continue. However, the use of this override is highly discouraged
as it may lead to very poor timing results. It is recommended that this error condition be corrected in the design. A
list of all the COMP.PINs used in this clock placement rule is listed below. These examples can be used directly in
the .ucf file to override this clock rule.
< NET "psclk" CLOCK_DEDICATED_ROUTE = FALSE; >
< PIN "N9_BUFG.GCLKMUX.I0" CLOCK_DEDICATED_ROUTE = FALSE; >
按照提示在.UCF文件中加入下面两条语句后
< NET "psclk" CLOCK_DEDICATED_ROUTE = FALSE; >
< PIN "N9_BUFG.GCLKMUX.I0" CLOCK_DEDICATED_ROUTE = FALSE; >
综合时提示
ERROR:ConstraintSystem:59 - Constraint <IN "N9_BUFG.GCLKMUX.I0"
CLOCK_DEDICATED_ROUTE = FALSE;> [ps2.ucf(16)]: PIN "N9_BUFG.GCLKMUX.I0" not
found. Please verify that:
1. The specified design element actually exists in the original design.
2. The specified object is spelled correctly in the constraint source file.