一个脉宽不断增加的pwm 程序 仿真波形不对 请指教程序中的错误
module pwm (clk,clk1, reset,pwm_out);input clk;
input clk1;
input reset;
output pwm_out;
reg full;
reg counter;
reg z;
reg pwm_out ;
reg clk2;
always @( posedge clk )
begin clk2=1 ;
#10 clk2=0;
end
always @(posedge clk1 or negedge reset or posedge clk2)
begin
if (reset==0)
begin
counter<=0;
full<=0;
end
else
if(clk2==1 )
begin
counter<=0;
full<=1;
end
else
if((counter<=z)&&(full==1))
begin
counter<=counter+1;
pwm_out<=1;
end
else
begin
pwm_out<=0;
z<=counter+1 ;
end
end
endmodule 你模块里少了几组begin和end，自己检查一下。。。 写程序需要细心，要出细活
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