always @ ( posedge clk or negedge rst)
begin
if (! rst )
begin
detect1 <= 1'b1;
detect2 <= 1'b1;
end
else
begin
detect1 <= sig_in;
detect2 <= detect1;
end
end
always @ ( posedge clk or negedge rst)
begin
if (! rst )
h21<=0;
else if(detect1==1'b0 && detect2==1'b1 )
h21<=1;
else
h21<=0;
end