招聘 FPGA designer and senior designer

1. 地点:南京
2. 招聘企业: 世界前三强通信公司(外企)
3. 职位: Digital engineer or senior engineer (FPGA design)
4.工作内容:telecommunication Baseband Unit FPGA design
5.要求                 .
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Job Requirements:
        Ability to generate block level definitions and FPGA requirements for the design team (senior engineer)
           Block level Micro-architecture, RTL Design, Verification, Synthesis and timing.
        Complete understanding of the FPGA design flow.
        Knowledge of FPGA-Design and Formal Verification tools. Good VHDL (or Verilog) RTL experience
           Good knowledge of Altera or Xilinx FPGA is preferred
        Excellent analysis/debugging skills and using scripting languages (e.g. HiT, TCL)
           Work Experience in FPGA area: >4 years
           Work Experience in wireless communication design >5 year is preferred
           Foreign Language: English  good at communication
           Education: Bachelor/Master (Electrical Engineering)

Job Description:   
        Participate in outlining product architecture definition and derive the functional specification for FPGA functionality level
           Detailed logic functionality and FPGA code design/implementation.
        Simulating the needed functionality
        Generating the test bench environment for the verification
        FPGA verification planning, validation and testing on board.
           Transferring design and DV environments from partner
        System emulation and bring-up on FPGA prototype
           release maintenance of selfdeveloped FPGA products.

6. 待遇: 洽议
7. 联系方式 arena_pan@msn.com
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