展示一段opencores上面的“非常牛的”可综合代码

展示一段opencores上面的“非常牛的”可综合代码

// generate output registers
always @(posedge clk)
begin
  r <= #1 iR;
  g <= #1 iG;
  b <= #1 iB;
  if (RGBbuf_wreq)
  begin
   Ra <= #1 iRa;
   Ba <= #1 iBa;
   Ga <= #1 iGa;
  end
  if (srst)
  begin
   vdat_buffer_rreq <= #1 1&#39;b0;
   rgb_fifo_wreq <= #1 1&#39;b0;
   clut_req <= #1 1&#39;b0;
  end
  else
  begin
   vdat_buffer_rreq <= #1 ivdat_buf_rreq;
   rgb_fifo_wreq <= #1 RGBbuf_wreq;
   clut_req <= #1 iclut_req;
  end
end

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展示一段opencores上面的“非常牛的”可综合代码