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When programming MAX, user can turn on a secuirty option which prevents programming image from reading out of the device. Regarding FPGA in general, such as Cyclone, because of its high density and routing complexity, it is extremely difficult as they do not know exactly the internal architecture of the device. Even if people can reverse the bit stream to derive the LUT structure of the design, , to try to reverse it back to the original gate level logic, not to talk about the RTL or architectural level, it would be near to impossible. If they are concerned with people just copying the FPGA content and reproduce the same board, they can put a small portion of the design into a CPLD. |
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