|
module controlable_pulse_generater(Clk,Rst,Fout,NU,ND,MU,MD);
input Clk; //外界输入的时钟信号
input NU; //按键模块S1,使N值递增
input ND; //按键模块S5,使N值递减
input MU; //按键模块S2,使M值递增
input MD; //按键模块S6,使M值递增
input Rst; //复位信号输入
output Fout; //波形输出
reg Fout;
reg [10:0]M_buffer,N_buffer,N_count;
reg Clk_in;
reg [11:0] Clk_out=0; //产生低速时钟信号
always @ (posedge Clk)
begin
if(N_count==N_buffer)
N_count=0;
else
N_count=N_count+1;
end
always @ (posedge Clk)
begin
if(N_count<M_buffer)
Fout=1;
else if(N_count<=N_buffer&&N_count>=M_buffer)
Fout=0;
end
always @ (posedge Clk)
begin
Clk_out=Clk_out+1;
Clk_in=Clk_out[11];
end
always @ (posedge Clk_in)
begin
if(Rst==0)
begin
N_buffer=11'b10000000000;
M_buffer=11'b01000000000;
end
else if(NU==0)
N_buffer=N_buffer+1;
else if(ND==0)
N_buffer=N_buffer-1;
else if(MU==0)
M_buffer=M_buffer+1;
else if(MD==0)
M_buffer=M_buffer-1;
end
endmodule
看看这个程序符合要求不。 |
评分
-
1
查看全部评分
-
|