FPGA Design Engineer-芯意信息科技有限公司

发布日期：        2010-04-09        工作地点：        西安        招聘人数：        若干
工作年限：        一年以上                                    
职位描述
Responsibilities:
1. Design, development and maintain the FPGA prototyping of complex SoC design.
2. Working as one of the ASIC team member to support the verification of both ASIC and related firmware validation.
3. Low power design implementation.
4. FPGA RTL design, integration, synthesis, timing analysis and lab debugging.

Requirements:
1. Proficient RTL design and FPGA synthesis experience.
2. Familiar with related EDA tools. Familiar with version control tools.
3. Good knowledge in communication, multimedia, audio and video codec is preferred.
4. Good Script skills and hands-on experience.
5. Strong analytical, creative, self-motivated, good communication skills and team player.
联系方式
电子邮箱：         xinyi560@sina.com

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