下面两种检测SCK上升沿的方式各有什么优缺点吗

1.
always @(posedge clk)  
SCKr <= {SCKr[1:0], SCK};
wire SCK_risingedge = (SCKr[2:1]==2'b01);  

2.
always @(posedge SCK)

怎么看不明白？下面的sck是3bit  （posedge sck）？？