|
1124| 1
|
请教一下VHDL如何实现循环计数然后有标志位再计特定长度的数后停止 |
| ||
/1
|小黑屋|手机版|Archiver|fpga论坛|fpga设计论坛
( 京ICP备20003123号-1 )
GMT+8, 2025-12-2 00:56 , Processed in 0.063080 second(s), 19 queries .
Powered by Discuz! X3.4
Copyright © 2001-2023, Tencent Cloud.