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TI&Xilinx lvds参考设计

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老怪甲 该用户已被删除
老怪甲 发表于 2010-5-17 10:23:03 | 显示全部楼层 |阅读模式
本帖最后由 fpgaw 于 2011-1-27 05:48 编辑

TI&Xilinx lvds参考设计

Texas Instruments has an 8-channel, 12-bit ADC family with synchronous LVDS outputs. The
performance rates of these ADCs range from 40 MSPS to 70 MSPS. This family fits nicely with
the LVDS I/Os of the Virtex-II, Virtex-II Pro, and Spartan-3 devices.
To highlight the performance of both the ADC and the FPGA, the reference design described in
this application note uses the ADS5273, which is the highest speed sampling ADC. The
ADS5273 interfaces to an XC2V250-6FG256 device (to fit the Texas Instruments demo board)
and to an XC2VP20-6FF896 device (to fit Xilinx demo boards).

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fpga_feixiang 发表于 2021-8-9 15:44:23 | 显示全部楼层
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